1. Field of the Invention
The present invention relates to a method of manufacturing low parasitic capacitance bit line for stack dynamic random access memory (DRAM).
2. Description of Related Art
In semiconductor manufacturing methods, especially regarding to the stack dynamic random access memory (DRAM), it is well-known to use silicon nitride as the spacer so as to satisfy the needs for formation of capacitor contacts in the array during the processes of the manufacturing methods.
Refer first to FIG. 1, which shows a semiconductor base in the manufacturing method for the stack DRAM, wherein the semiconductor base depicted in FIG. 1 has been formed with a semiconductor base 1a through pre-processes such as diffusion, lithography, etching etc., which semiconductor base 1a comprising a stack 11a of plural bit lines, and the steps for forming bit lines having the silicon nitride spacer 12a include the following steps:
1. using silicon nitride to deposit a thin layer onto the semiconductor base 1a; 
2. performing anisotropic etching, wherein the ions bombard on the deposited silicon nitride in a vertical direction, while the sidewalls of the stack are free of such a bombard thus retained to form the silicon nitride spacer 12a; 
3. depositing an oxide layer onto the semiconductor base 1a; 
4. performing chemical machine polishing (CMP) on the oxide layer;
5. forming the contact hole by means of lithography and etching;
6. filling the polysilicon to form the capacitor contact; and
7. performing CMP on the polysilicon.
However, in terms of the aforementioned approach for forming the bit line having the silicon nitride spacer, since the dielectric constant of silicon nitride tends to be comparatively higher, use of silicon nitride as the spacer may generate more significant parasitic capacitance which would cause greater interference to the circuitry, thus potentially jeopardizing the efficiency and quality of the operations in the stack DRAM.
Accordingly, in consideration of the above-illustrated drawbacks, the inventors of the present invention have disclosed the present invention which is reasonably designed and allows to eliminate the defects in prior art.